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The technology development within Synopsys India is centered on software design of Electronics Design Automation (EDA) tools and chip design flows and methodologies. The services part of the organization focuses on the Architectural/RTL design of FPGA/chip Intellectual Properties (IP's) and design methodology consulting for Synopsys customers worldwide.
The following shows a listing of core disciplines and the projects executing on them.
Software
| Core Disciplines | Projects |
| C/C++ Design |
Physical Synthesis, VCS Simulation, VERA Testbench Automation, GUI |
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Chip Design
| Core Disciplines | Projects |
| Algorithmic Implementation, C-architectural design, RTL design |
Synopsys Professional Services |
| Floorplanning, Routing, TEST, RTL2GDSII Methodology/ Application |
Methodology and Application Center |
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Tool design for electronics design and verification is the fundamental work at Synopsys. EDA tools are specialized software that help design and verify chips and electronics systems on the computer. To build good EDA tools, a thorough knowledge of logic design, computer architecture and programming languages (C/C++) is required. Synopsys India annually recruits sharp CS/EE graduates from IITs and RECs to train them on EDA tool development. Synopsys India also hires experienced software engineers, who have a flair for logic design, from the local IT industry.
EDA tools are generally more complex than other software tools. The quality of design implementation often depends on how well the design tool is used for the job. To aid designers with the tool flow problems and design methodologies, and sometimes to help them with the actual circuit design, Synopsys India has a team of engineers who are experts in logic design and chip design tool applications. These engineers offer consultation to Synopsys worldwide customers on chip/FPGA designs and design methodologies. Synopsys India hires experienced chip/logic designers from the industry to this team.
Learn more about the benefits of working at Synopsys India!
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