|

| Date | Location | Workshop | Cost USD/person |
| Nov 25-27 |
Hsinchu |
SystemVerilog Test Bench (SVTB) Language |
300 |
| Dec 10-11 |
Hsinchu |
IC Compiler 1 |
200 |
| Dec 15-17 |
Hsinchu |
Desigen Compiler 1 |
300 |
|
| Date | Location | Workshop | Cost USD/person |
| Jan 6-8 |
Hsinchu |
PrimeTime 1 |
300 |
| Jan 14-15 |
Hsinchu |
Star-RCXT |
200 |
| Jan19-20 |
Taipei |
IC Compiler 1 |
200 |
| Jan 19-20 |
Hsinchu |
VCS |
200 |
| Jan 21-22 |
Taipei |
Hspice Essentials |
200 |
| Jan 21-22 |
Hsinchu |
SystemVerilog Assertion (SVA) Language |
200 |
| Jan 26 |
Taipei |
NanoSim |
100 |
| Jan 26 |
Hsinchu |
IC Compiler 2 (CTS) |
100 |
| Jan 27-29 |
Taipei |
PrimeRail |
300 |
| Jan 27-29 |
Hsinchu |
SystemVerilog Test Bench (SVTB) Language |
300 |
| Feb 2-3 |
Taipei |
Hspice Advanced |
200 |
| Feb 2-3 |
Hsinchu |
Formality |
200 |
| Feb 4-5 |
Taipei |
Hsim |
200 |
| Feb 4-5 |
Hsinchu |
Magellan |
200 |
| Feb 9-10 |
Hsinchu |
SystemVerilog Verification Using VMM Methodology |
200 |
| Mar 10-12 |
Taipei |
Desigen Compiler 1 |
300 |
| Mar 10-12 |
Hsinchu |
Astro 1 |
300 |
| Mar 16-17 |
Hsinchu |
IC Compiler 1 |
200 |
| Mar 18-19 |
Hsinchu |
Power Compiler |
200 |
| Mar 24-26 |
Hsinchu |
DFT Compiler 1 |
300 |
| Mar 25-26 |
Taipei |
Star-RCXT |
200 |
| Apr 13-14 |
Hsinchu |
Hspice Essentials |
200 |
| Apr 15-16 |
Hsinchu |
TetraMAX 1 |
200 |
| Apr 21-23 |
Hsinchu |
PrimeRail |
300 |
| Apr 22-23 |
Taipei |
VCS |
300 |
| Apr 27-28 |
Hsinchu |
Hsim |
200 |
| Apr 29 |
Hsinchu |
IC Compiler 2 (HDP) |
100 |
| May 12-14 |
Hsinchu |
PrimeTime 1 |
300 |
| May 13-14 |
Taipei |
SystemVerilog Assertion (SVA) Language |
200 |
| May 18-19 |
Taipei |
IC Compiler 1 |
200 |
| May 19 |
Hsinchu |
NanoSim |
100 |
| May 20-21 |
Taipei |
SystemVerilog Verification Using VMM Methodology (SVTB–VMM) |
200 |
| May 20-21 |
Hsinchu |
Hspice Advanced |
200 |
| May 26 |
Hsinchu |
IC Compiler 2 (CTS) |
100 |
| May 27-28 |
Taipei |
Formality |
200 |
| May 27-28 |
Hsinchu |
Star-RCXT |
200 |
| Jun 2-4 |
Hsinchu |
Design Compiler 1 |
300 |
| Jun 9-10 |
Taipei |
Magellan |
200 |
| Jun 24-25 |
Hsinchu |
Low Power Flow: HLD (Front End) |
200 |
| Jul 8-9 |
Hsinchu |
VCS |
200 |
| Jul 13-14 |
Hsinchu |
Hspice Essentials |
200 |
| Jul 15-16 |
Hsinchu |
SystemVerilog Assertion (SVA) Language |
200 |
| Jul 21-23 |
Hsinchu |
SystemVerilog Test Bench (SVTB) Language |
300 |
| Jul 27-28 |
Hsinchu |
Hsim |
200 |
| Jul 29-30 |
Hsinchu |
Low Power Flow: Physical Implementation |
200 |
| Aug 3-4 |
Hsinchu |
Formality |
200 |
| Aug 5-6 |
Hsinchu |
NanoTime |
200 |
| Aug 10-11 |
Hsinchu |
Power Compiler |
200 |
| Aug 12-13 |
Taipei |
IC Compiler 1 |
200 |
| Aug12-13 |
Hsinchu |
SystemVerilog Verification Using VMM Methodology (SVTB–VMM) |
200 |
| Aug 19-20 |
Taipei |
Star-RCXT |
200 |
| Aug 19-20 |
Hsinchu |
Magellan |
200 |
| Aug 24 |
Hsinchu |
Nanosim |
100 |
| Aug 25-27 |
Hsinchu |
PrimeRail |
300 |
| Sep 1-3 |
Hsinchu |
Design Compiler 1 |
300 |
| Sep 7 |
Hsinchu |
NanoTime Ultra |
100 |
| Sep 8-10 |
Hsinchu |
DFT Compiler 1 |
300 |
| Sep 29-30 |
Hsinchu |
IC Compiler 1 |
200 |
| Oct 1 |
Hsinchu |
IC compiler 2 (CTS) |
100 |
| Oct 2 |
Hsinchu |
TetraMAX 1 |
100 |
| Oct 7 |
Taipei |
IC compiler 2 (HDP) |
100 |
| Oct 7-8 |
Hsinchu |
Hspice Essentials |
200 |
| Oct 19-20 |
Hsinchu |
Hsim |
200 |
|
** Synopsys reserves the right to cancel or re-schedule the workshops **
Download Taiwan 2010 training handbook (PDF) for description and agenda of all courses.
Download Taiwan 2010 training schedule(PDF)
Download Taiwan 2010 training location map (PDF)
Daily Class Time: 9:30am - 12:00pm, 1:30pm - 17:00pm
Registration
City: Taipei and Hsinchu Registration can be made by contacting Ms. Yulin Chen at Tel: 03-552 5880 ext 81878 or
Fax: 03-552 5883.
Training registration form (PDF)
|